1. Field
The present embodiments relate to a semiconductor memory having dynamic memory cells and to a system.
2. Description of the Related Art
Recently, portable equipment such as mobile phones which operate using a battery are gaining popularity. A semiconductor memory mounted in such portable equipment is required to consume low power so that the battery can be used for long time. Further, in recent portable equipment, a large amount of data of images, music files or the like is often handled. Replacing of work memories for these portable equipment are in progress from SRAMs having a small storage capacity and a high cost per bit to DRAMs having a large storage capacity and a low cost per bit. Along with this, DRAMs that consume low power are demanded for portable equipment.
For reducing the power consumption, DRAMs having a partial self-refresh mode are developed (for example, see Japanese Unexamined Patent Application Publication No. 2003-68075). A DRAM of this type has a function to change the size of a partial refresh area for which a refresh operation is executed during the self refresh mode. Further, in portable equipment having various functions, the volume of retained data is different for each operating function.
The DRAMs having a self refresh mode and pseudo SRAMs which internally execute a refresh operation automatically have an oscillator which generates a refresh request periodically. For example, the partial refresh area is set by rewriting bit values in a mode register by a setting command. The refresh request occurs asynchronously with supply timing of the setting command. Accordingly, when timing of changing the partial refresh area by the setting command and the timing of occurrence of the refresh request overlap, there is a fear that the refresh operation is not executed in the area where the refresh operation should be operated. Thus, data retained in the memory cells disappear. In other words, the semiconductor memory malfunctions.